USB3FPGA

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    • Is USB3FPGA also available with Delphi drivers or can this be converted?

      There's no direct interface to delphi implemented. I'm not sure which version of delphi is used and which versions support .NET, but we have an interface to .NET 1.1 which may work with delphi as well.

      In addition to this, there's a C wrapper, which allows the access to the API using a DLL which contains simple C function call. IMHO it's possible to call these functions from delphi in a really easy way. (drbob42.com/delphi/headconv.htm)

    • Hello!
      I am trying to write linux driver for USB3FPGA device. It will be libusb-based shared object file which will export all the same calls from windows dll. But on this moment I have no document which describe communication between device firmware and dll. I do not need any sources (neither firmware or dll) only protocol description needed.
      Looking forward for your cooperation.
    • Use of USB2FPGA board

      Hi, I am asking a hint. Looking at the board I have an idea, but I need someone to help that I am not heading in the wrong direction
      My need is to interface a microcontroller (16/32 bit) doing is things with a PC. I was thinking to use the SRAM as Dual Port ram for creating a fast data exchange area, but without use much microcontroller time (in my head microcontroller should simply use this RAM for reading and writing data ) and have no wasted time in communication with pc, because this is done by FTPGA & Cypress USB chip. Am I correct? is it possible to transform the SRAM in a Dual Port SRAM using FPGA logic? of course I mean a real DP-ram with transparent access from both sides. Thanks a lot to anyone can help me or give me suggestions. Gianni :)
    • Hello Gianni,

      a lot of things are "possible". That is boon and bane of FPGA technology ;) .
      Host-PC communication is done by Cypress USB controller and FPGA design. No additional external logic is needed for that. FPGA is used as glue logic in many applications, i. e. for connecting D/A-, A/D-converters, other intelligent digital circuits ...
      External SRAM sharing could be done, i. e. by implementing a multi-port external memory controller. Of course bandwidth would be reduced on every channel.

      Best regards
      S.
      CESYS development engineer / FPGA design
    • interfacing matlab with fpga

      Hi,Iam using x2s_usb .i have to transfer data from matlab to FPGA using usb port. the drivers available with it r for windows 2000 and 98 .how can i get drivers for window xp

      and is thier any possibility to connect matlab and x2s_usb using visa.
    • Hi Ghazal,

      schematic diagram for USB3FPGA can be downloaded from our website. Please use this link to reach the product page for USB3FPGA. In Downloads section You will also find the Circuit diagram Ver.1.1. In case of further questions, please do not hesitate to ask. Please also feel free to contact our support via e-mail to support@cesys.com.

      Best regards,
      Michael Hufnagel
      [Dipl.-Ing. (Univ.) Elektrotechnik]

      CESYS Gesellschaft für angewandte Mikroelektronik mbH
      Hardware- Entwicklung und Validierung
    • hi

      i am using USB3FPGA and successfully installed its driver(cypress usb
      generic driver 3.4.7000 ). i am using CYSUSB CONTROL CENTER & USB CONSOLE
      for my communication with the USB3FPGA board and it works.
      After i used
      option " program FX2---->small EEPROM " of the USB control center and loaded
      an " .iic " file in it. After loading it , the device is not anymore detected
      by the control center.i have also reinstall the driver but driver installation
      wizard shows the error msg :
      "cypress USB Generic Driver
      (3.4.7000)
      This device cannot start.(Code 10) "

      how to
      get rid of this problem?
    • data transfer from usb3fpga to other fpga using fx2lp

      hello,

      i am using USB3fpga and spartan 3e development kit .i want to transfer some data from sparten 3e to usb3fpga using gpios.

      i m monitoring ep2 flag of fx2lp on sp 3e kit and flag d on the USB3fpga.when ep6 is not full on usb3fpga, i write data from gpios of s 3e kit to the usb3fpga.Data transferred is monitored by cyconsole but the data displayed is junk.....!

      if i use only sp 3e kit to transfer data though its fx2lp and monitor it on cyconsole,it is correctly displayed.
      junk data is only displayed when i interface sp3e with usb3fpga.
      is there a clk problem or any other?
      hw can i interface both so that data transferred from sp 3e to usb3fpga using fx2lp?