Hi guys,
I need to propagate an interrupt from my custom FPGA IP core to the HPS system of a DE0_nano_SoC (Cyclone V HPS-FPGA architecture) and handle in Linux. I have searched some electronic websites such as Kynix Semiconductor and picked up something relating, but still have so many confusions, so i was hoping that anyone of you could help me with that. Now let me explain it：
Required functionality
The custom FPGA IP core sets an interrupt signal. The HPS registers this signal (possibly writes to the custom FPGA IP core to de-assert the interrupt signal) and copies a few bytes from registers in the FPGA to a program running in Linux.
The choice of Linux is arbitrary, preferably Angstrom/Yocto, which I have running right now, but if the FreeRTOS would offer simpler implementation I would go for it.
My assumptions (please correct me if wrong)
1) The Interrupt Controller in the HPS recognices the FPGA generated interrupts, starting at the number 73 (there is some shifting, but in principle they are mapped with constant values).
2) Linux for ARM Cortex A9, is able to recognize vendor specific interrupts (for different peripherals like I2C0/1/2, UART0/1, etc).
Question
1) Does Linux recognize the interrupts from the FPGA, mapped by HPS Interrupt Controller?
2) Do I need to develop a driver, so that the Linux can recognize the FPGA interrupts ?
3) This seems to be quite important feature of the whole Cyclone V architecture. Hasnt Altera developed such drivers already, to handle simple FPGA-to-HPS interrupts in Linux ?
Many thanks in advance!
I need to propagate an interrupt from my custom FPGA IP core to the HPS system of a DE0_nano_SoC (Cyclone V HPS-FPGA architecture) and handle in Linux. I have searched some electronic websites such as Kynix Semiconductor and picked up something relating, but still have so many confusions, so i was hoping that anyone of you could help me with that. Now let me explain it：
Required functionality
The custom FPGA IP core sets an interrupt signal. The HPS registers this signal (possibly writes to the custom FPGA IP core to de-assert the interrupt signal) and copies a few bytes from registers in the FPGA to a program running in Linux.
The choice of Linux is arbitrary, preferably Angstrom/Yocto, which I have running right now, but if the FreeRTOS would offer simpler implementation I would go for it.
My assumptions (please correct me if wrong)
1) The Interrupt Controller in the HPS recognices the FPGA generated interrupts, starting at the number 73 (there is some shifting, but in principle they are mapped with constant values).
2) Linux for ARM Cortex A9, is able to recognize vendor specific interrupts (for different peripherals like I2C0/1/2, UART0/1, etc).
Question
1) Does Linux recognize the interrupts from the FPGA, mapped by HPS Interrupt Controller?
2) Do I need to develop a driver, so that the Linux can recognize the FPGA interrupts ?
3) This seems to be quite important feature of the whole Cyclone V architecture. Hasnt Altera developed such drivers already, to handle simple FPGA-to-HPS interrupts in Linux ?
Many thanks in advance!
