Hello,

you talked about instabilities after installing the drivers, please specify this in more detail. Does the instability come from pure installation or when using the device only ? In the first case, is the instability still present after de-installing the drivers, with the plugged device only ?

In any way:
- Have you ever tried another PCI slot ?
- Do you have Vista SP1 installed ?
- Any suspicious settings in PCI-related BIOS settings ?
- Are you able to do a parallel installation of Windows XP on this machine ?
- Do you have other PCI devices plugged in this machine ?
- What motherboard/chipset do you use ?
- Have you tried to update the drivers for you motherboard ?
- Are there any BIOS updates available for your motherboard (which may resolve any Vista <-> PCI conflicts) ?

If the drivers are the problem, we have to clarify that we use the drivers that were published by the manufacturer of the PCI controller that is used on our board. We try to always stay up to date with their releases.
Our software sits on top on this and may create instabilities when actively used only, but this wouldn't affect the system stability, as our code purely acts in user space.

Another thing if instability occurs when actively using our device is the used FPGA design. What design do you use ? The one that ships with our device ? The modification of our design can cause freezes and other unwanted effects when doing wrong !

I'm not familiar with Net BSD driver architecture. If there's a way to port the Linux driver you may try it, otherwise I'm not sure PLX (PCI controller manufacturer) will release drivers for this architecture.

If you solve the problem, it would be very nice to inform us about the circumstances, so we can improve the quality of our products.

Hope this helps.

Dear Thom,

Below are the answers to your questions.

1. When I connected the device, there were no problems while booting or running.

2. When I started installing the drivers it restarted my system and a blue scree (windows most horrible screen) appeared showing there are problems with my system and presented the menu list with the options to enter in safe mode or start windows normally. When I tried to start normally the problem continued. So, I removed the device from System , but the same problem continued. I had to enter into the safemode to remove the device from device manager, only after that every thing was fine.

3. I have installed Service pack 1, updated mother board drivers and tried, but the same problem continued.

4. PCI slot change does not help.

5. Yes I have other devices plugged in the other PCI slot. Moschip PCI Parellel port adapter connected, and working.

6. I never tried to install XP in the machine.

7. As I could not able to install the drivers, I could not work with FPGA, So, there is no chance that the FPGA design causing the instability.

8. I will comile the source code provided for NetBSD, connect the device and let you know If I have any problems.

9. I dont think there are Vista - PCI conflicts as other device in the other PCI slot is working fine.

10. The mother board I have is D2740 From Fijitsu Siemens.

Hope I get the vista drivers soon.

Thanks for the quick reply and I expect the same in future too.

Regards,

Ranga Prasad.

One more question, do you use Vista 32 or 64; Home, Professional, Business, Ultimate ?

In general: Up to now Vista is not on the list of officially supported
operating systems. Vista support is planned to come for one of the next
UDK releases. There is no official release date, most probably it will
be in December.

Specific to your problem: UDK is built on top of
the PLX drivers. As long as you dont have the PCIS3BASE plugged into
your system, only the drivers from PLX are active. At the time you get
the blue screen, not one single line of CESYS code is executed. The UDK
relies on working PLX drivers. UDK Version 1.15 uses the PLX drivers
that were up to date when it was released (Version 5.2). In the
meantime there are new drivers available from PLX (Version 6.x). The
next UDK Version will make use of them. Maybe they include a fix that
affects your problem. Anyway, although at this time not officialy
supported by the UDK, some users are running Vista and we have no
reports of problems or blue screens. That makes me guess your
chipset/motherboard is either incompatible with PLX drivers V5.2 - or
your system has other problems (overclocked, not completly removed
other drivers or software, hardware defect, ...). When you have the
chance, take another PC and try if it works. I am sorry, that I cant
give you a quick and clean solution right now.

Hello,

a direct data transfer from PLX9056 local bus to SDRAM would not work, even if a hardware connection would be made. SDRAM accesses need an appropriate control logic, which PLX9056 does not have!
You will have to implement a FPGA design including SDRAM control logic and arbitration logic to allow SDRAM accesses from local bus side and internal logic side.

Best regards

Look at the demo design that comes with the PCIeV4BASE board.
It allows the PC to access the Memory module.
It uses the Wishbone bus concept and could be the base of your own FPGA design.

Hello,

WISHBONE is an on-chip-bus-system, which is completely used for FPGA-internal data transfers between IP-Cores. External FPGA-I/O-balls are not needed.

FPGA user I/Os are connected to PLX local bus. First a FPGA design has to be downloaded - using the "Download Design" button - , that can handle PLX local bus transactions, if you want to use "Register I/O" or "Data Transfer".
After downloading the FPGA bitstream file, the use of "Register I/O" or "Data Transfer" leads to appropriate PLX local bus cycles, transferring data from cesys-Monitor.exe application to user-made FPGA-designs and vice versa. The files transferred by "Data Transfer" do not appear at FPGA configuration interface, but at PLX local bus, i. e. to initialize or read back on-board-memory contents.
FPGA is memory mapped, if your FPGA design is designed to be memory mapped. Our WISHBONE example demonstrates a memory mapped application. Address map of this example can be found in example source code file "wishbone.vhd". Look for C/C++-style "#define"s after VHDL comments ("--").

Putting all together:

• "Download Design" is for downloading binary bitstream files of FPGA-designs
  
• "Register I/O" and "Data Transfer" is for easy testing, prototyping and communication of user-made FPGA-designs
  

Further information can be found in PCIS3BASE user manual cesys.de/resources/CE031.pdf and in example source code.

Best regards

Hello,

As you said, when PCIS3Base_top design file is downloaded (Wishbone package contains the address map), I can access the devices Leds, Flash, SD RAM etc. I can even write to the location 0x20000014 which is LEDs address and make them glow. But my doubt is even if I dont implement this design, Register IO is still active and I could read the memory locations (I dont know which memory location belongs to which device) but however I could not make LEDs glow (I wrote to the same address 0x20000014) but the memory location is updating the value with the new one and when I read again it is showing the new value. If I dont implement the PCIS3base_top design, from where the address map is provided I mean what does the address say 0x20000014 is refered to?

Thanks in advance.

Regards,

Ranga Prasad.

Hello Ranga,

memory map is user defined. If you want to access an user register at a user specified address, you have to implement an address decoder for WISHBONE/PLX-Local-Bus-Bridge (wb_ma_plx.vhd) or for PLX-Local-Bus directly, if you don't want to use our WISHBONE master example. An address decoder can be implemented by using VHDL constructs like CASE-statements, IF/ELSIF/ELSE-sequences, FOR-loop/IF-statement combinations etc. ...

Address decoding is splitted in our WISHBONE example design PCIS3BASE_top. Some of address MSBs are used to select the appropriate module inside the interconnection logic (0x2??????? selects GPIO module), some of address LSBs are used to select the appropriate register or whatever inside the modules (0x??????14 selects LED control register).

Best regards