Reading Bulk Data from FPGA to PC via USB

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    • Reading Bulk Data from FPGA to PC via USB


      I am trying to write some code to read in 512 byte chunks of data, based on EFM01_perf and the C++ example code. I want to read in data continually from the FPGA to the PC, and have encountered a few problems:

      1) After reading other posts, I assume readBulk() is no longer accessible, so I must use readBlock() instead. My question relates to the parameters of this function. What address do I read from? What is the I/O specific flags parameter?
      2) I understand that the data must be read after 512 bytes have been loaded into the FX-2 buffer, but wow does the host know when to read? Which flag must I check, and how do I check it?
      3) I don't understand the link between pins and register addresses - is there some kind of table or datasheet that can help me with this?

      Many thanks for your assistance :)

    • Hello,

      1) readBulk() is not available anymore, you are right. The addresses are specified by the FPGA design, so they are totally up to you. The reference design (to which the UDK is designed) contains a 32 bit wishbone bus. You should use it as development base and add your components to this bus. You will not require any flags, just the address and a buffer to receive data or source data for sending.

      2) A read operation from host side will create a read operation on the wishbone bus inside the FPGA. Your wishbone-periphery must handle this if the operation is targetted to it using the address.

      3) There's no table as far as I know. What exactly didn't you understand? The reference design contains periphery for BRAM, Flash and I/O's as well as direction configuration flags for each pin. As for the I/O's, the designs always bundles 32 I/O's into one register. To read there level, you have to make a register read to this specific address.

      You may also take a look into UDK3 examples, especially in the code that shows EFM-01 handling. The example toggles the onboard LED for some time using this functionality. The LED is controlled using bit 30 in register 0x100000, set it to enable the LED, clear it to disable it. Read register 0x100000 and check bit 30 to get it's current status.
      Software development
      Cesys GmbH
    • Thank you for your reply, Thomas.

      As I mentioned, I wish to use "EFM01_perf" as an "endless source" - and simply read in to the PC the counter values that "EFM01_perf" sends. I don't want to implement the entire wishbone bus. Is there perhaps a simple code example that can show me how to read in C++? The current example reads from BRam, which doesn't exist in "EFM01_perf".

      1) I still don't know what address to supply to readBlock() since EFM01_perf doesn't use block RAM or flash memory?
      2) When the buffer is full app_fifo_wr_full_o goes HIGH. If the host application reads before the buffer is full, then won't an incomplete packet be read? Thus my question about flags...


    • Graham,

      all available sample code is included in the downloadable file…ES/
      You can replace the Wishbone-side of the transfer-FIFO by your own code and feed in your own data. But you will have to keep the protocol handling (target address, transfer size) intact.
      I guess, the easiest method is to use a wishbone interface with your endless data-source and ignore the target address value. In software you will have to insert a dummy-address and concatenate block transfers to get an virtual "endless" flow.
      Manfred Kraus
      Cesys GmbH