How does data from the PC get programmed to the Flash?

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    • How does data from the PC get programmed to the Flash?

      Hello Forum,

      My first time on a Forum, hope I get the etiquette correct.

      Recently got my Papilio Duo and a LogicStart wingy, itching to get it all running. Intend to VHDL, not drag and drop...that's the intention anyway.

      Essentially, being from an electronics background, I like to know what's going on. To that end, I've been wading my way through the plethora of Xilinx datasheets associated with the Spartan-6-LX9.

      At the moment I have couple of quick questions for the collective forumers

      The LX9 FPGA is set with M0 =1 and M1 =0, this sets the device in Serial Master Mode so it will get its configuration bit stream from the Flash on power up or if PROGRAM_B is pulled low, so :

      1) How does data from the PC get programmed to the Flash?

      2) I see other questions relating to the PC software configuring the FPGA(Have a futher understanding of FPGA=> through the USB port, am I missing something in the circuit diagram, I cant see how this is possible? Unless there is something pre-configured, pre-programmed that we are shielded from.......

      hope they're not too stupid questions. :/
    • Hello Joshua,

      you can ask questions for your Papilio Duo board here, but I'm afraid you won't get
      any answers here. The CESYS team will comment on the configuration of CESYS
      FPGA boards only, and other CESYS forum members will rarely answer questions
      of other members. Probably you should try another forum.

      Best regards,

      Manfred R.
      Software Development
      CESYS GmbH