Where is the efm-03 reference design ?

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    • Where is the efm-03 reference design ?


      We bought one or your efm-03 beastboard for one of our prototype product.
      The UDK3.0 works as expected with the bitstream efm03_wrapper.bin.

      Unfortunately, I cannot find the reference design for this board.
      Needless to say, I do not want to fiddle with pin timing constraints with the DDRL3 and the udk protocol. That would miss the point of your products.

      Can you publish the reference design with sdk+ddrl3 on vivado ? efm03_wrapper sources would be nice.

      Thank you,
      leptons-technologies developper
    • Hello Lucien,

      thank you for your feedback. We are working very hard to finish preparing the
      reference design for the EFM-03 and are in the final stages of the release
      process. We agree that it should not be your task to fiddle with all the small
      things related to the UDK protocol. The final version of the reference design
      will provide this functionality to you so you can concentrate on your application.
      That has been our goal with all our previous USB boards and we will provide the
      same functionality for our new EFM-03.

      We will notify you as soon as it becomes available. We are sorry for the delay.

      Best regards,
      Manfred R.

      Manfred R.
      Software development
      Cesys GmbH
    • Hello Lucien,

      thank you very much for being patient and sorry for the delay.

      We finally finished the reference design for our EFM-03. As usual the sources are now available within the
      Software, Downloads and Updates section. Please see the thread for the EFM-03 reference designs and IP
      for the download link.

      The efm03_wrapper design hopefully provides all that is needed to get easily started with developing
      your own designs for EFM-03. The AXI-FX3-Interface provides easy connectivity between a host with
      Superspeed USB3.0 interface using CESYS UDK3 and AXI based slave peripherals. Included in the reference
      design are interfaces for the DDR3L memory, block ram, GPIO and user led.

      If you need further information or help, please let us know. We will be very happy to be of assitance.

      Besrt regards,
      Michael Hufnagel
      [Dipl.-Ing. (Univ.) Elektrotechnik]

      CESYS Gesellschaft für angewandte Mikroelektronik mbH
      Hardware- Entwicklung und Validierung