EFM 01

    • What else do I need beside the EFM 01?

      To convert a FPGA design into a loadable bitsream, you also need a FPGA development system. XILINX offers a free development system called ISE™ WebPack™ for download on their webssite. If you connect the EFM 01 to your PC by USB 2.0, you can use the Cesys provided tools to configure the FPGA and to program the flash memory of the EFM 01.


      Dont I need a Xilinx download-cable?

      You only need a download-cable when you want to use Xilinx tools or tools from other providers, that require a JTAG connection. This is true for Impact™ and ChipScope™ among others.


      Do I need a power supply unit?

      No, the EFM 01 module can take its power from the USB Interface.
      Actually, it provides 3,3 Volt on its headers in this case. Only if you use the EFM 01 without USB connection, you'll have to provide 5 Volt external power.


      So USB can even supply other devices connected to the EFM 01?

      That is true. When attached to USB only the parts needed to establish connection are powered. Until the PC enables the device it must not draw more than 100 mA current. After the PC has loaded the driver and enabled the device, up to 500 mA are allowed. Then the EFM 01 switches on the FPGA supply and the 3,3 Volt supply of the headers.
      Please take care not to draw more current than specified by the EFM 01 manual.


      Can I also use the EFM 01 without any USB or JTAG connection?

      You can write the FPGA configuration bitstream to the flash memory. For this you'll have to connect USB or JTAG one time. After this, the FPGA of the EFM 01 always configures itsself out of the flash memory after powering on.


      Can I do more with the USB interface then just load configuration data to the FPGA?

      The USB interface is a connection between your FPGA design and your software running on the PC. You can use the provided samples as a starting point for your own designs. We have optimized the drivers and the firmware to archieve the maximum data rate your PC can do. Start the benchmark tool that comes with the EFM 01 to measure the maximum USB data rate of your system. Depending on the chipset and the performance of the PC, up to 38 MByte/s are possible.


      Which voltage levels can be used with the I/O Pins of the EFM 01?

      The IO standard of the EFM 01 is LVTTL (3,3 Volt). For details please read the EFM 01 manual. Never apply 5 Volt signals directly to the EFM 01. This will cause irreparable damage.
    • The FX-2 USB controller on the EFM01 board can transfer data with the maximum speed your PC can handle.
      This can be as high as 42 MByte/s - it can also be much less. The bigger the block size, the faster it is.
      But there is another important point: The data is transferred in blocks. Between the blocks there is a gap (latency).
      If the data stream from the FPGA can not be stalled between the transmission of two blocks, you will need enough
      memory to buffer the data or you might loose some data.
      What is your application and what data rate do you need?

      Export to Switzerland takes 3 to 5 days.

      You can use the data in your LabView application as you like. You can plot it or process it in many other ways.

      regards
      Manfred Kraus
      Manfred Kraus
      Cesys GmbH
    • UDK lab /efm01 support

      Respected sir,
      I am using CE041_EFM01 kit for my project (i want to transfer data from PC to FPGA and vice versa through cypress FX2 in slave fifo mode.
      1) I am not understanding the 2 examples provide in the documentation of UDK kit( wishbone and other one).what i have to do with these files to get my task completed?

      2)Next is that how to use UDK lab to check the working of implemented USB interface.Data is not sufficient to understant the working of UDK lab.i m not getting the idea of its working.
      Please provide the necessary help regarding udk lab,examples,code and steps that i have to do to get implement/verifying my USB interface.
      i am wainting for your kind support.
      Thanks
    • 1)
      I have ran the LED blinking sequence given in UDKlab part of CE041_EFM01.pdf which result in led blinking on board.but i cant understand the working e.g when i press read button it always give one value(4000000).nothing happens on write button.also on live view...every entry is zero.
      2)
      I also downloaded the efm01_perf.bin design in the fpga ,it is burnt succefully.but when i start start sequence nothing is on the right side of screen(no registers to read or write).
      my question is that how to formulate these registers ,so that i can read/write them ?
    • Sorry the test-design is "efm01_top.bin"
      • Load the test-design "efm01_top.bin"
      • Click "Start Sequence" (orange Button at the Bottum)
      Switch LED
      • Pin H2 (look led_blinker.ucf)
      • pin_gpio_io<30> (efm01.ucf)
      • "Add new rigister entry."
      • Add Register Adress: 0x00100008 (GPIO-Baseadress + GPIO_0_OE_OFFSET (wishbone.vhd))
      • Enter Hex-Value: 0x40000000 (Bit 30 - Output-enable)
      • "Add new rigister entry."
      • Add Register Adress: 0x00100000 (GPIO-Baseadress + GPIO_0_OFFSET (wishbone.vhd))
      • Enter Hex-Value: 0x40000000 (Bit 30 - LED)
      Torsten
      FPGA/LABView development
      Cesys GmbH
    • Dear Mr. Shehryar,
      The file "efm01_perf.bin" is only a performance denonstation.
      The files "efm01_top" are an example how you can programm the FPGA.
      You can write bulk with the UDK-Lab or with the C-API (Function ReadBlock/WriteBlock)
      Because of the 32-bit data-wide there is an address-increment of 4.
      Kind regards
      Torsten
      FPGA/LABView development
      Cesys GmbH
    • i want to write bulk amount of bytes.i have changed 286 and 293 lines of wishbone.vhd in emf01 project files as:
      286 constant bram_alignment:std_logic_vector(rng_adr):=x"0000_0002";
      293 #define bram_alignment 0x0000 0008

      after this i made .bin file of it and load in udk.i made BLOCK RAM base address 0x00000000,size 2048 bytes and alignment to 8 bytes in udk.then i write 8 bytes value but no 8 bytes appear in the live view but only 4 bytes.
      how can i get 8 bytes data transfer?