Hello,
I am actually trying to use the efm02_soc_reference_design. I am having some difficulties launching it on Xilinx. Are they some specific settings to apply?
The warning message that i have is: "The device settings for core 'Async_Fifo_8k0x32'/'gpif_clock'/'clock_alignment''mcb_ddr2' do not match the ISE project settings.
I am actually trying to use the efm02_soc_reference_design. I am having some difficulties launching it on Xilinx. Are they some specific settings to apply?
The warning message that i have is: "The device settings for core 'Async_Fifo_8k0x32'/'gpif_clock'/'clock_alignment''mcb_ddr2' do not match the ISE project settings.