efm02_perf_top_XC6SLX45 Project Status (02/13/2014 - 12:06:15)
Project File: efm02_perf_top_XC6SLX150.xise Parser Errors: No Errors
Module Name: efm02_perf_top_XC6SLX45 Implementation State: Programming File Not Generated
Target Device: xc6slx45-3fgg484
  • Errors:
 
Product Version:ISE 14.7
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment:  
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk ReportCurrentDo 13. Feb 12:05:53 2014
WebTalk Log FileCurrentDo 13. Feb 12:06:15 2014

Date Generated: 02/13/2014 - 12:06:15