efm02_soc_top Project Status
Project File: efm02_soc_slx150.xise Parser Errors: No Errors
Module Name: efm02_soc_top_XC6SLX150 Implementation State: New
Target Device: xc6slx150-3fgg484
  • Errors:
 
Product Version:ISE 14.7
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment: System Settings
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk ReportOut of DateDo 16. Jan 13:48:57 2014
WebTalk Log FileOut of DateDo 16. Jan 13:49:18 2014

Date Generated: 01/16/2014 - 16:31:14